1. Field of the Invention
The present invention relates to CMOS sensors, and more particularly, to a method of performing interlaced preview for a CMOS sensor.
2. Description of the Prior Art
Video images are typically divided into pixels, each pixel containing information about color and brightness of the video image at the pixel's location. The video image is also called a frame, and a typical video is recorded at 24 frames per second (24 fps) or higher. As each frame in the video is displayed on a screen, such as a liquid crystal display (LCD) or a cathode ray tube (CRT), corresponding pixels of the screen are controlled to display the color and the brightness corresponding to each pixel of the video image. With each passing frame, the color and brightness of each pixel are likely to change. Thus, the screen must modify each pixel for each successive frame in the video. Typically, the screen will modify the pixels one at a time, from left to right and top to bottom, in a process call scanning.
If the screen utilizes progressive scan technology, the screen will modify each line in ordered sequence from the top of the screen to the bottom of the screen. However, to save bandwidth, many screens utilize interlaced scan technology, meaning the screen first modifies odd rows of the screen from top to bottom, then even rows of the screen from top to bottom, effectively cutting in half the number of pixels to be received, processed, and modified in each pass. The odd rows are typically called an “odd field,” and the even rows are typically called an “even field.”
In modern applications, CMOS sensors of recording devices can be used to generate interlaced video signals for use with interlaced screens. Please refer to FIG. 1, which is a diagram illustrating a method of generating an interlaced video frame in a CMOS sensor according to the prior art. The CMOS sensor typically includes a sensor array 100, which has a plurality of sensor lines S1-S480, each comprising red (R) and green (G) subpixels, or green (G) and blue (B) subpixels, in alternating sequence, which may be utilized to interpolate pixels with RGB color information. The RGB subpixels may be controlled by a color filter, which allows light corresponding to the color of each subpixel to strike the subpixel. Each row of pixels in the interlaced video frame is generated from two or more rows of the sensor array 100 that, when combined, include R, G, and B information. To generate an odd field of the interlaced video frame, a first frame 102 at time T(n) may be read out, and odd lines of the frame (L1, L3, L5, and so on) may be interpolated as shown. To generate an even field of the interlaced video frame, a second frame 104 at time T(n+1) may be read out, and even lines of the frame (L2, L4, L6, and so on) may be interpolated as shown. Please note that each pixel of the first frame 102 and the second frame 104 is generated from surrounding pixels to form rows of RGB pixels that are utilized for the interpolation operations mentioned above. In the method shown in FIG. 1, each frame captured by the sensor array 100 can only provide one field to the display device. Thus, the sensor array 100 must be very fast. For example, if the display device runs at 30 fps, the sensor array 100 must capture 60 frames per second. In other words, the sensory array 100 can only be exposed for a maximum of 1/60th of a second. Further, because the odd field and the even field are captured at different times, if the scene being captured has objects in rapid motion, the interlaced video frame may exhibit jagged edges.
Please refer to FIG. 2, which is a diagram illustrating a second method of generating an interlaced video frame in a CMOS sensor according to the prior art. In the second method, a sensor array 200 is used to detect rows of subpixels S1-S480 (similar to FIG. 1). The rows of subpixels S1-S480 are then read out into a frame buffer 202. Finally, an odd field 203 and an even field 204 are generated from rows in the frame buffer 202. The odd field 203 includes a plurality of odd lines O1-O240, and the even field 204 includes a plurality of even lines E1-E240. While the sensor array 200 can operate at a lower speed than the sensor array 100, and the even and odd fields 203, 204 are generated from a single frame, which eliminates the jagged edge effect, the method shown in FIG. 2 requires the frame buffer 202, which represents added hardware and complexity.
Please refer to FIG. 3, which is a diagram illustrating a third method of generating an interlaced video frame in a CMOS sensor according to the prior art. In the third method, an RGB paired sensor array 300 is utilized. The RBG paired sensor array 300 is different from the sensor array 100 and the sensor array 200 in that RG rows and GB rows of the RGB paired sensor array 300 are repeated, or doubled, so that when an odd field 301 and an even field 302 are read out, every pair of two lines comprises red, green, and blue color information. Thus, interpolation can be performed on the odd field 301 and the even field 302 to obtain pixels of the frame. However, the RGB paired sensor array 300 requires a non-traditional color filter to generate the special subpixel pattern shown in FIG. 3, making manufacture and design of the CMOS sensor less practical.